README file for the BASE science camera CAD files
=================================================

The BASE science camera board set that we use is the following:
base_pre_v2             Preamp pcb
base_dsp_v3             DSP timing generator pcb
base_clkdrv_v2          Clock driver pcb
base_sig_v2             Signal processing pcb
base_pwr_v2             Power board

base_bpA_v2             Backplane pcb [10-slot design]
base_bpB_v2             Backplane pcb [ 4-slot design]
base_bpC_v2             Backplane pcb [ 5-slot design]
base_extender_v1        Extender board for BASE electronics

pci_v3                  PCI interface pcb [optical]

The origninal board set was designed with Protel99SE, which
is now obsolete.  Known issues with the pcbs are listed here:
a- some wires barnacled onto the sig board to correct a
design error in an address decoder
b- resistor + capacitor on the dsp board clock recovery
circuit

The updated board set that is available is the following:
base_pre_v3             Preamp pcb
base_dsp_v3             DSP timing generator pcb
base_clkdrv_v3          Clock driver pcb
base_sig_v3             Signal processor pcb
base_pwr_v3             Power pcb

base_bpA_v2             Backplane pcb [10-slot design]
base_bpB_v2             Backplane pcb [ 4-slot design]
base_bpC_v2             Backplane pcb [ 5-slot design]
base_extender_v1        Extender board for BASE electronics

pci_v3                  PCI interface [optical]

The updated boards were designed with Protel DXP. These boards 
have a few differences from the first board set:
a- the preamplifier is a simpler design
b- the barnacles on the sig pcb have been cleaned up, and the sig pcb
uses a monolithic 16-bit ADC (less heat, lower noise)


The epld files that go with the board sets are listed here:
base_epld_v3.6          EPLD code for base_dsp_v3
pci4w_epld_v3.6         EPLD code for pci_v3 [optical]
pci16_epld_v3.6         EPLD code for pci_v3 [RS-485]
nvram_v3                Serial eprom code for pci (all versions)
base_loader_v3.1        EEPROM code for base_dsp_v3


CAD notes
=========
Protel99SE was used to design the v1 pcbs (not shown), and the
v2 pcbs.  The revised v3 pcbs were designed with Protel DXP.

The v2 schematics and pcb layouts have been imported into DXP,
but I haven't tried to generate gerbers from these DXP files.
So far, we have only used them for printing the schematics and
viewing the layouts (ie so that we don't have to use Protel99
any more).

The epld files were originally designed with Altera MaxPlusII
software.  These are being converted over to the current QuartusII
software, also from Altera.


Other files
============
SITE_cable
MITLL_cable
wing_cable
led_v1
STA4K_v1